Research

Dr. Wang's research centers on a continuous hardware-software co-design pathway that connects algorithms, system architecture, implementation, and validation. From firmware development for commercial video decoder chips, to fast convolution algorithms and FPGA verification during her doctoral research, and now to Edge AI, VLSI, and layout-oriented teaching and research, her work reflects a coherent progression from practical IC development experience to intelligent hardware system innovation.

Research Development Path

A concise visual roadmap from industry foundation to current research directions.

Research Development Path Hardware–software co-design from industry foundation to Edge AI and VLSI directions Current & Emerging Direction Edge AI · FPGA Acceleration · VLSI Systems AI Models on Edge Devices Grapevine Goodwill REU Algorithm + FPGA Validation Fast Convolution · Architecture · Verification Industry Foundation Montage Technology · Firmware · Digital IC Development & Verification

Research Projects

Projects are listed from newest to oldest. Click any project image to enlarge it.

2026 – Present

NSF REU 2026 Summer Research: Edge Devices for Microplastics Detection

This REU project reflects Dr. Wang's current interest in using ECE knowledge to guide undergraduate research toward meaningful real-world applications. Students are introduced to sensing, embedded systems, model deployment, and hardware-aware design through edge-device-based microplastics detection.

In this project, AI is not treated as an isolated software model. Instead, it is framed as a complete engineering pipeline that connects sensing, inference, deployment constraints, and system validation—an extension of Dr. Wang's long-standing hardware-software co-design perspective.

Project site: NSF REU 2026 Homepage

2025 – Present

AI-Driven Clothing Recognition and Pricing System for Goodwill

Related award: Faculty Development Council Grant Program FY2026 →

This project applies AI and computer vision to a practical recognition-and-pricing system for clothing items in a circular-economy setting. It demonstrates Dr. Wang's continuing emphasis on taking intelligent models beyond theory and adapting them to real application environments.

The project also reflects her broader research direction in efficient AI deployment: building systems where model performance, application constraints, and implementation practicality are considered together rather than separately.

2021 – 2025

Fast Convolutional Algorithm Optimization and FPGA Acceleration

This research direction is a central bridge between algorithm design and hardware realization. Dr. Wang's doctoral work on fast convolution algorithms focused on improving computational efficiency for AI acceleration, while also moving those ideas toward FPGA-oriented implementation and validation.

The project clearly represents a software-algorithm + hardware-platform co-design approach: signal processing theory, algorithm optimization, architecture-level thinking, and FPGA verification all interact as part of a unified development path.

2024

Grapevine Bud / Inflorescence Detection and Yield Prediction

This project studies grapevine bud burst detection, inflorescence detection, and yield-related analysis using field-acquired RGB images. It represents Dr. Wang's extension of AI model development toward practical edge-oriented vision tasks in challenging natural environments.

In the larger context of her work, this project highlights the transition from model design toward efficient deployment thinking: how AI models can be improved, adapted, and eventually moved closer to resource-constrained edge devices and real operational scenarios.

2012 – 2018

Video Decoder Chip Development at Montage Technology

As a Firmware Engineer at Montage Technology, Dr. Wang worked on video decoder chip related development for embedded multimedia and set-top-box systems. This experience gave her direct exposure to digital IC development, verification processes, firmware-hardware interaction, and the complete workflow required to move from design objectives to validated system behavior.

That industry foundation remains an important starting point for her current academic work. It explains the continuity in her research—from system validation and implementation constraints, to FPGA-based acceleration, and now toward broader VLSI and lower-level hardware design topics in both research and teaching.